1. Field of Invention
This invention relates to an electrostatic discharge (ESD) protect circuit, and particularly to an ESD protect circuit of which the breakdown speed can be adjusted.
2. Description of Related Art
ESD means movement of electrostatic charges from a non-conductive surface, which easily damages the semiconductor and other circuit components in integrated circuits. For example, when an ordinary charged body, such as a human body walking on a carpet or a machine for packaging or testing integrated circuits, contacts a chip, it will discharge electricity to the chip. The transient power of the ESD will possibly cause damage or failure of the integrated circuits in the chip.
To prevent damage of ICs by ESD, ESD protect circuits are usually included in an IC. There are various designs for ESD protect circuits, wherein an ordinary design includes two N-type transistors connected in series, of which the gate electrodes are biased with a constant voltage. However, the holding voltage of the discharge path provided by such scheme is usually lower than 10.5 V, so that electrical overstress (EOS) events may occur frequently in operation of the internal circuits to disturb the same.
Hence, it is important in the industry to design and fabricate an ESD protection device that does not disturbing normal operation of the internal circuits.